The Anritsu MP1775A 03 is a four-channel pulse pattern generator delivering clean signals from 100 Mbps to 12.5 Gbps per channel. Engineered for high-speed digital signal generation and characterization, it evaluates optical and electrical components, modules, and devices in 10 Gbps WDM equipment environments. The instrument operates as a standalone source or integrates into comprehensive multi-channel test systems. With 32 Megabits total pattern memory (8 Mbits per channel), it supports programmable patterns, PRBS sequences up to 2³¹-1 bits, SONET/SDH frames to OC-768c/STM-256c, and CID patterns for clock recovery stress testing.
– Technical Specifications
• Data Rate: 100 Mbps to 12.5 Gbps per channel
• Channels: 4
• Pattern Memory: 32 Megabits total (8 Megabits per channel)
• Data Output Amplitude: 0.5 to 2.0 Vp-p per channel, independently settable
• Data Output Offset: –2.0 to +2.0 VOH, settable in 5 mV steps
• Clock Output Amplitude: 0.5 to 2.0 Vp-p, settable in 10 mV steps
• Clock Output Offset: –2.0 to +2.0 VOH, settable in 5 mV steps
• Clock Output Variable Delay: –500 to +500 ps in 1 ps steps
• Sync Output Amplitude: 1 Vp-p fixed
• Load Impedance: 50 Ohm (all outputs)
• Data/Clock Termination: Selectable GND or –2V (ECL)
• Sync Termination: 50 Ohm to GND
• Connectors: APC-3.5 (data and clock), SMA (sync)
• Error Insertion: Supported, rates 10⁻⁴ to 10⁻⁹, single-bit insertion
– Key Features
• Internal clock option with selectable external clock input (0.8 to 2.0 Vp-p sine or pulse, >500 MHz)
• Independent amplitude and offset control per data channel
• Dual clock outputs with programmable delay
• Back-termination for waveform distortion reduction
• Front-panel cross-point adjustment
• GPIB and parallel control interfaces
• 3.5-inch FDD parameter memory (MS-DOS compatible)
– Typical Applications
• 10 Gbps WDM equipment validation
• Optical transceiver characterization
• High-speed electrical component stress testing
• Clock recovery circuit evaluation
• SONET/SDH frame generation and analysis
– Compatibility & Integration
• Pairs with MP1776A 4-Channel Error Detector for simultaneous BER testing
• Integrates into ME7760B 43.5 Gbps or ME7780A 48 Gbps BER Test Systems
• Combines with MP1801A 43.5G Multiplexer for 40 Gbps pattern generation
• Compatible with MP9861A E/O converter for 40 Gbps optical signal generation
• Optional MX177601A software enables SONET/SDH frame and CID pattern support


















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