Corelis NetUSB-1149.1 JTAG Boundary Scan Controller

The Corelis NetUSB-1149.1 is an IEEE 1149.1–compliant JTAG boundary-scan controller for testing, debugging, and in-system programming (ISP) of CPLDs, FPGAs, Flash memories, and other IEEE 1149.1–compatible devices. It connects to host computers via USB 2.0 (backward compatible with USB 1.1) or 10/100Base-T Ethernet, supporting flexible deployment across various distances from the target system.

## Technical Specifications

• **JTAG Clock (TCK) Rate:** Up to 70 MHz programmable; up to 80 MHz for NetUSB-1149.1/E
• **Test Access Ports (TAPs):** Four independent TAPs (NetUSB-1149.1/E); eight TAPs with integrated ScanTAP-8 pod (NetUSB-1149.1/SE); single TAP via SCSI II 68-pin connector (basic model)
• **Concurrent Testing:** Up to four boards concurrently (NetUSB-1149.1/E); up to 512 boards with specific configurations
• **Serial Interfaces:** I2C at 100 kHz; SPI at 1 MHz
• **Voltage Levels:** TAP and GPIO signals programmable from 1.3 V to 3.3 V; 0.05 V resolution on select models
• **Analog Measurement:** Eight ±50 V channels (two per TAP)
• **Host Connectivity:** USB 2.0 or 10/100Base-T Ethernet

## Key Features

• Memory-behind-the-pin architecture drives scan operations at continuous JTAG clock speeds
• Automatic signal delay compensation for extended cable lengths to the Unit Under Test
• Pre-power-up shorts testing between power and ground lines per TAP
• Independently configurable output voltage and input voltage threshold
• Direct write signal for expedited Flash programming
• Flash RDY/BSY signal monitoring support

## Typical Applications

• High-volume production testing and concurrent gang programming
• Boundary-scan diagnostics and fault isolation
• In-system reprogramming of programmable logic and Flash devices

## Compatibility & Integration

Fully compliant with IEEE Standard 1149.1 for test access. Supports multi-TAP architectures enabling concurrent testing and programming across multiple boards in production environments.