HP-Agilent-16702B-Logic-Analysis-System-w-16760A , 16718A and Cables

The HP-Agilent 16702B Logic Analysis System is a modular digital test platform combining the 16702B mainframe with 16760A and 16718A logic analyzer modules for state, timing, and high-speed signal analysis. This configuration delivers up to 1.5 GHz state acquisition and 800 MHz timing analysis across 34 channels per module, with 64M to 128M sample memory depth and advanced pattern-based triggering via VisiTrigger for complex debug workflows.

– Technical Specifications

16702B Mainframe:
• Display: 12.1-inch color touch screen, 800 × 600 resolution
• Module slots: 5 measurement, 1 emulation/Multiframe
• Storage: 18 GB HDD with 40x CD-ROM drive
• Memory: 128 MB system RAM (upgradeable to 256 MB with Option 003)
• Networking: 10/100 BaseT LAN auto-sensing
• Power input: 115 Vac to 230 Vac, single phase, 48 to 66 Hz, max 630 W
• Operating system: Compatible with 16700-Series Version A.02.00 and higher

16760A Logic Analysis Module:
• Type: State and timing analyzer
• Channels: 34 per module (17 per pod)
• State speed: Up to 1.5 GHz (half channel mode); 800 Mb/s and 1250 Mb/s modes
• Timing speed: Up to 800 MHz
• Memory depth: 64M samples (800 Mb/s mode); 128M samples (1250 Mb/s mode)
• Signal acquisition: Up to 1.5 Gbits/s with differential inputs
• Probe capacitance: Low-capacitance, high-density design for minimal bus loading

– Key Features

• VisiTrigger interface enables pattern matching, flag events, and range-based triggering
• Eye diagram analysis on hundreds of channels simultaneously
• User-configurable or probe-supplied logic threshold voltage for device tracking
• Touch-screen and front-panel knob navigation with dedicated hotkeys

– Typical Applications

Debug and verification of high-speed digital systems, parallel bus analysis, signal integrity assessment, and protocol-level troubleshooting.

– Compatibility & Integration

The 16760A and 16718A modules integrate directly into the 16702B mainframe, sharing a unified software environment and trigger architecture across all measurement channels.