The Tektronix P6960 is a 34-channel single-ended logic analyzer probe engineered for high-density circuit debugging and fast bus characterization. It leverages D-Max® Probing Technology to achieve minimal circuit intrusion while maintaining signal integrity across complex digital systems. The probe head delivers 32 data channels plus 2 clock/qualifier channels, supported by two 34-channel module-end connectors and a 1.8 m cable.
– Technical Specifications
• Channel Configuration: 34 channels (32 data + 2 clock/qualifier)
• Input Resistance: 20 kΩ to Ground, typical
• Input Capacitance: < 0.7 pF to Ground, typical
• Dynamic Range: 6.5 Vp-p
• Operating Voltage Range: −2 V to +5 V
• Maximum Nondestructive Voltage: ±15 V
• Minimum Digital Swing (TLA7AAx/TLA7ACx modules): 150 mV single-ended
• Minimum Digital Swing (TLA7BBx/TLA7BCx modules): 100 mV single-ended
• Cable Length: 1.8 m (6 ft.)
• Analog Bandwidth (TLA7Bxx module): 3 GHz through iCapture™
• Analog Bandwidth (TLA7ACx module): 2 GHz through iCapture™
– Key Features
• High channel density enables capture of complex digital architectures
• Sub-0.7 pF capacitive loading minimizes measurement artifacts on sensitive circuits
• Connectorless probing system eliminates onboard connector requirements
• Compatible with both 0.100 in. and 2 mm square pin configurations
• Optional flying leadset provides flexibility for non-high-density layouts
• D-Max® Technology reduces probe footprint while preserving signal fidelity
– Typical Applications
• High-density PCB debugging and validation
• Multi-channel digital signal acquisition
• Fast serial and parallel bus characterization
• Complex system state machine analysis
– Compatibility & Integration
The P6960 interfaces with Tektronix TLA7000 Series, TLA6200 Series, TLA7ACx Series, TLA7BBx Series, and TLA7BCx Series logic analyzer modules. Board-level integration requires 0.100 in. or 2 mm square pin patterns with immersion gold surface finish recommended. Probe attachment holes should remain floating or isolated from ground planes to optimize performance.




















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